Most microsystem interconnections are formed using wire bonds or bump bonds. Industries and national laboratories have been jointly pursuing a partially 3D interconnect technology, which has the potential to increase the amount of circuitry per pixel by a factor of 2-3 This development effort has taken considerable time and resources, while producing very modest results due to the intrinsically difficult nature of the processing involved. In contrast, the technology presented here is less expensive, simpler, and can increase the circuitry per pixel. Fabricating wraparound conductive traces is a key element of the success of this technology. Show Partial Abstract